1. Field of the Invention
The present invention relates to a memory module having a semiconductor memory chip, and a method of manufacturing the same.
2. Description of the Related Art
Heretofore, JP-A-63-156348 and JP-A-2002-170919 disclose structures for laminating a plurality of LSI's (Large Scale Integrated circuit) by providing through-electrodes in semiconductor chips made of silicon or the like which are formed with circuits, and methods of manufacturing such structures. In these disclosed techniques, laminated LSI's and underlying substrates are all singularized into chips, and sequentially laminated using connection electrodes provided in each of the chips to form a memory module having desired functions.
In the techniques disclosed in the foregoing documents, the lowermost chip is in danger of breakage because it is repeatedly applied with force when bumps are bonded or thermo-compression bonded to each other. The chip is more likely to be broken as it is reduced in thickness with the intention to reduce the thickness of the overall memory module.
Also, since a memory module comprises a plurality of laminated chips, the influence exerted by heat coming from the plurality of chips must be taken into consideration when the memory module is operated.